1. Field of the Invention
The present invention relates generally to the fabrication of integrated circuits on substrates. More particularly, the invention relates to a method of reducing oxides on a substrate prior to depositing a layer thereover in the fabrication process.
2. Background of the Invention
Reliably producing sub-half micron and smaller features is one of the key technologies for the next generation of very large scale integration (VLSI) and ultra large scale integration (ULSI) integrated circuits. However, as the fringes of circuit technology are pressed, the shrinking dimensions of interconnects in VLSI and ULSI technology has placed additional demands on the processing capabilities. The multilevel interconnects that lie at the heart of this technology require careful processing of high aspect ratio features, such as vias and other interconnects. Reliable formation of these interconnects is very important to the VLSI and ULSI success and to the continued effort to increase circuit density and quality of individual substrates and die.
Conventional chemical vapor deposition (CVD) and physical vapor deposition (PVD), and now electroplating, techniques are used to deposit electrically conductive material into the contacts, vias, lines, or other features formed on the substrate. Considerable effort has focused on reliably depositing material in these high aspect ratio, smaller interconnects.
One issue that still needs improvement as feature sizes shrink is the reduction of oxides in these very small features. FIG. 1 shows a substrate 2 with a via 4 formed within an electrically insulative or dielectric layer 6. With current technology, the aspect ratio has increased to approximately 5:1 for the height to width ratio, shown in FIG. 1 as x with respect to d. As a result, it is becoming more difficult to properly prepare the surfaces within the small features for subsequent processing, especially in the lower interconnect portions, such as in the interconnect areas 8, 9.
In part, this attention to improved cleaning is due to a desired change in the conductor metal. For example, copper is now being considered as an interconnect material in place of aluminum, because copper has a lower resistivity (1.7 μΩ-cm compared to 3.1 μΩ-cm for aluminum) and higher current carrying capacity. However, copper is highly susceptible to oxidation. With copper depositions, oxidation is considered a detriment and interferes with adhesion on the adjacent layer, affects conductivity of the copper feature, and reduces the reliability of the overall circuit. Furthermore, present processes utilize oxygen for a variety of reasons in some instances and in other instances, oxygen is a byproduct of the reactions. Thus, even carefully controlled environments may contain oxygen that may oxidize copper or other conductive materials, such as aluminum, to the detriment of the circuit.
Copper has other difficulties. Because copper is difficult to etch in a precise pattern, traditional deposition/etch processes for forming interconnects has become unworkable, and accordingly, a “dual damascene” structure is being used for copper interconnects. In a typical dual damascene structure, the dielectric layer is etched to define both the contacts/vias and the interconnect lines. Metal is then inlaid into the defined pattern and any excess metal is typically removed from the top of the structure in a planarization process, such as CMP. This complex approach increases the importance of obtaining properly cleaned surfaces within the interconnects.
Prior to the present invention, an inert gas plasma, such as an Argon (Ar) plasma, physically cleaned the surfaces of interconnects and metal layers, such as aluminum and copper, as ions were attracted to the substrate surface to physically bombard the surface and remove the surface of the uppermost layer. However, the Ar ions in the plasma depend on directionality to clean and with the decreasing sizes of the interconnects, the increasing aspect ratios, and the resulting shading that can occur, this process is ineffective in removing oxides in the small features.
Therefore, there is a need for an improved cleaning process to reduce oxides formed on the surface of substrates and materials deposited thereon.